Reference: MS certutil doc
C:> certutil -hashfile path-to-your-file SHA256
FlexLm licence info
How to find flexlm license users.
ModelSim environment variables
license env variable: MGLS_LICENSE_FILE=port@ip
Resets and synchronisers
Links to Xilinx CDC and timing closure documentation.
Vivado TCL scripting
See user guides ug835-vivado-tcl-commands.pdf and ug894-vivado-tcl-scripting.pdf
Vivado batch mode
When invoking Vivado tools from DOS, you first need to run the file settings64.bat (located in your Xilinx install area e.g. C:\Xilinx\Vivado\2017.3) in order to get your path updated as appropriate. https://www.xilinx.com/support/documentation/sw_manuals/xilinx2017_3/ug975-vivado-quick-reference.pdf
FSM attributes
“fsm_safe_state” attribute will direct Vivado Synthesis to insert logic into a state machine that specifies what should happen in the case of an illegal state. “power_on_state” attribute forces the state machine into the power-on state using Hamming-2 encoding detection for one bit/flip. Reference: 1) https://www.xilinx.com/support/answers/60799.html 2) UG901 v2017.4, Chapter 2 Synthesis Attributes, Page 47, https://www.xilinx.com/support/documentation/sw_manuals/xilinx2017_4/ug901-vivado-synthesis.pdf
OSVVM
Simple starter to using OSVVM. http://www.synthworks.com/blog/2013/05/16/functional-coverage-made-easy-with-vhdls-osvvm/ https://www.doulos.com/httpswwwdouloscomknowhow/vhdl/
Vivado ILA cross triggering
Vivado uses two different ILA cores when the design is being debugged with signals residing in two clock domains. As a result the hardware manager shows two different signal waveform window and separate triggers without any apparent way to have a common trigger signal between the two. Many times we have felt the need to …
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