Vivado uses two different ILA cores when the design is being debugged with signals residing in two clock domains. As a result the hardware manager shows two different signal waveform window and separate triggers without any apparent way to have a common trigger signal between the two. Many times we have felt the need to trigger both waveforms windows at a common trigger point. Here are the findings which shows how to enable this functionality:
- UG908 (v2018.3): Vivado Programming and Debugging Guide Section: ILA Cross Trigger, page 138
ILA Cross Trigger
ILA Cross Triggering feature enables cross triggering between ILA cores, and between ILA cores and a processor for example, Zynq®-7000 SoC. This feature is useful for when you want to trigger between two ILA cores that are in different clock domains, or perform
hardware/software cross triggering between a processor and an ILA core.
For using cross trigger feature, at core generation time, you should configure the ILA core to have dedicated trigger input ports (TRIG_IN and TRIG_IN_ACK) and dedicated trigger output ports (TRIG_OUT and TRIG_OUT_ACK). If you want to use the ILA trigger input or output signals, you must use the HDL instantiation method of adding ILA cores to your
design.
2) AR6702: Vivado 2014.1 – Logic Debug – How to trigger two ILAs for different clock domains.
https://www.xilinx.com/support/answers/61072.html
You can use the Trigger In and Trigger Out port of an ILA core to cascade these two ILA cores. Turn on the Trigger Out mode in the front ILA and set the trigger condition for this ILA. Set the behind ILA to capture only when there is a trigger in event. You could also OR the trigger in signal with a condition on the counter if you needed to. To start the capture, arm the behind ILA first, then arm the front ILA. When the condition is met both ILAs will be triggered.